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lt1818/lt1819 1 18189fb typical application description 400mhz, 2500v/?, 9ma single/dual operational ampli ers the lt ? 1818/lt1819 are single/dual wide bandwidth, high slew rate, low noise and distortion operational ampli? ers with excellent dc performance. the lt1818/lt1819 have been designed for wider bandwidth and slew rate, much lower input offset voltage and lower noise and distortion than devices with comparable supply current. the circuit topology is a voltage feedback ampli? er with the excellent slewing characteristics of a current feedback ampli? er. the output drives a 100 load to 3.8v with 5v sup- plies. on a single 5v supply, the output swings from 1v to 4v with a 100 load connected to 2.5v. the ampli? er is unity-gain stable with a 20pf capacitive load without the need for a series resistor. harmonic distortion is C85dbc up to 5mhz for a 2v p-p output at a gain of 2. the lt1818/lt1819 are manufactured on linear tech- nologys advanced low voltage complementary bipolar process. the lt1818 (single op amp) is available in tsot-23 and so-8 packages; the lt1819 (dual op amp) is available in msop-8 and so-8 packages. single supply unity-gain adc driver for oversampling applications l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. features applications n 400mhz gain bandwidth product n 2500v/s slew rate n C85dbc distortion at 5mhz n 9ma supply current per ampli? er n 6nv/ hz input noise voltage n unity-gain stable n 1.5mv maximum input offset voltage n 8a maximum input bias current n 800na maximum input offset current n 40ma minimum output current, v out = 3v n 3.5v minimum input cmr, v s = 5v n speci? ed at 5v, single 5v supplies n operating temperature range: C40c to 85c n low pro? le (1mm) tsot-23 (thinsot?) package n wideband ampli? ers n buffers n active filters n video and rf ampli? cation n communication receivers n cable drivers n data acquisition systems fft of single supply adc driver frequency (hz) amplitude (dbc) 0 C10 C20 C30 C40 C50 C60 C70 C80 C90 C100 C110 0 18189 ta02 5m 10m 15m 20m 25m f in = 5.102539mhz f s = 50msps v in = 300mv p-p sfdr = 78db 8192 point fft no windowing or averaging 2 3 C + lt1818 2.5vdc 1vac 18189 ta01 18pf 2.5v 51.1 5v 5v a in + ltc1744 14 bits 50msps (set for 2v p-p full scale) a in C
lt1818/lt1819 2 18189fb total supply voltage (v + to v C ) ..............................12.6v differential input voltage (transient only, note 2) .....6v output short-circuit duration (note 3) ............ inde? nite operating temperature range (note 8).... C40c to 85c (note 1) order information lead free finish tape and reel part marking* package description specified temperature range lt1818cs5#pbf lt1818cs5#trpbf ltf7 5-lead plastic tsot-23 0c to 70c lt1818is5#pbf lt1818is5#trpbf ltf7 5-lead plastic tsot-23 C40c to 85c lt1818cs8#pbf lt1818cs8#trpbf 1818 8-lead plastic so 0c to 70c lt1818is8#pbf lt1818is8#trpbf 1818i 8-lead plastic so C40c to 85c lt1819cms8#pbf lt1819cms8#trpbf lte7 8-lead plastic msop 0c to 70c lt1819ims8#pbf lt1819ims8#trpbf lte5 8-lead plastic msop C40c to 85c lt1819cs8#pbf lt1819cs8#trpbf 1819 8-lead plastic so 0c to 70c lt1819is8#pbf lt1819is8#trpbf 1819i 8-lead plastic so C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ absolute maximum ratings top view s5 package 5-lead plastic tsot-23 1 2 3 out 1 v C +in 5 4 v+ Cin +C t jmax = 150c, ja = 250c/w (note 10) 1 2 3 4 out a Cin a +in a v C 8 7 6 5 v + out b Cin b +in b top view ms8 package 8-lead plastic msop b a t jmax = 150c, ja = 250c/w (note 10) 1 2 3 4 8 7 6 5 top view C + nc v + out nc nc Cin +in v C s8 package 8-lead plastic so t jmax = 150c, ja = 150c/w (note 10) 1 2 3 4 8 7 6 5 top view v + out b Cin b +in b out a Cin a +in a v C s8 package 8-lead plastic so a b t jmax = 150c, ja = 150c/w (note 10) pin configuration speci? ed temperature range (note 9) .... C40c to 85c maximum junction temperature........................... 150c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c
lt1818/lt1819 3 18189fb electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. (note 9) v s = 5v, v cm = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage (note 4) t a = 0c to 70c t a = C40c to 85c l l 0.2 1.5 2.0 3.0 mv mv mv v os / t input offset voltage drift t a = 0c to 70c (note 7) t a = C40c to 85c (note 7) l l 10 10 15 30 v/c v/c i os input offset current t a = 0c to 70c t a = C40c to 85c l l 60 800 1000 1200 na na na i b input bias current t a = 0c to 70c t a = C40c to 85c l l C2 8 10 12 a a a e n input noise voltage density f = 10khz 6 nv/ hz i n input noise current density f = 10khz 1.2 pa/ hz r in input resistance v cm = v C + 1.5v to v + C 1.5v differential 1.5 5 750 m k c in input capacitance 1.5 pf v cm input voltage range (positive/negative) guaranteed by cmrr t a = C40c to 85c l 3.5 3.5 4.2 v v cmrr common mode rejection ratio v cm = 3.5v t a = 0c to 70c t a = C40c to 85c l l 75 73 72 85 db db db minimum supply voltage guaranteed by psrr t a = C40c to 85c l 1.25 2 2 v v psrr power supply rejection ratio v s = 2v to 5.5v t a = 0c to 70c t a = C40c to 85c l l 78 76 75 97 db db db a vol large-signal voltage gain v out = 3v, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 1.5 1.0 0.6 2.5 v/mv v/mv v/mv v out = 3v, r l = 100 t a = 0c to 70c t a = C40c to 85c l l 1.0 0.7 0.6 6 v/mv v/mv v/mv channel separation v out = 3v, lt1819 t a = 0c to 70c t a = C40c to 85c l l 82 81 80 100 db db db v out output swing (positive/negative) r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.8 3.7 3.6 4.1 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.50 3.25 3.15 3.8 v v v i out output current v out = 3v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 40 35 30 70 ma ma ma i sc output short-circuit current v out = 0v, 1v overdrive (note 3) t a = 0c to 70c t a = C40c to 85c l l 100 90 70 200 ma ma ma sr slew rate a v = 1 2500 v/s a v = C1 (note 5) ta = 0c to 70c ta = C40c to 85c l l 900 750 600 1800 v/s v/s v/s fpbw full-power bandwidth 6v p-p (note 6) 95 mhz
lt1818/lt1819 4 18189fb electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. (note 9) v s = 5v, v cm = 0v, unless otherwise noted. symbol parameter conditions min typ max units gbw gain-bandwidth product f = 4mhz, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 270 260 250 400 mhz mhz mhz t r , t f rise time, fall time a v = 1, 10% to 90%, 0.1v step 0.6 ns t pd propagation delay a v = 1, 50% to 50%, 0.1v step 1.0 ns os overshoot a v = 1, 0.1v, r l = 100 20 % t s settling time a v = C1, 0.1%, 5v 10 ns hd harmonic distortion hd2, a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 hd3, a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 C85 C89 dbc dbc dg differential gain a v = 2, r l = 150 0.07 % dp differential phase a v = 2, r l = 150 0.02 deg i s supply current per ampli? er t a = 0c to 70c t a = C40c to 85c l l 910 13 14 ma ma ma the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. (note 9) v s = 5v, 0v; v cm = 2.5v, r l to 2.5v unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage (note 4) t a = 0c to 70c t a = C40c to 85c l l 0.4 2.0 2.5 3.5 mv mv mv v os / t input offset voltage drift (note 7) t a = 0c to 70c t a = C40c to 85c l l 10 10 15 30 v/c v/c i os input offset current t a = 0c to 70c t a = C40c to 85c l l 60 800 1000 1200 na na na i b input bias current t a = 0c to 70c t a = C40c to 85c l l C2.4 8 10 12 a a a e n input noise voltage density f = 10khz 6 nv/ hz i n input noise current density f = 10khz 1.4 pa/ hz r in input resistance v cm = v C + 1.5v to v + C 1.5v differential 1.5 5 750 m k c in input capacitance 1.5 pf v cm input voltage range (positive) guaranteed by cmrr t a = C40c to 85c l 3.5 3.5 4.2 v v input voltage range (negative) guaranteed by cmrr t a = C40c to 85c l 0.8 1.5 1.5 v v cmrr common mode rejection ratio v cm = 1.5v to 3.5v t a = 0c to 70c t a = C40c to 85c l l 73 71 70 82 db db db minimum supply voltage guaranteed by psrr t a = C40c to 85c l 1.25 2 2 v v psrr power supply rejection ratio v s = 4v to 11v t a = 0c to 70c t a = C40c to 85c l l 78 76 75 97 db db db
lt1818/lt1819 5 18189fb the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. (note 9) v s = 5v, 0v; v cm = 2.5v, r l to 2.5v unless otherwise noted. symbol parameter conditions min typ max units a vol large-signal voltage gain v out = 1.5v to 3.5v, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 1.0 0.7 0.6 2 v/mv v/mv v/mv v out = 1.5v to 3.5v, r l = 100 t a = 0c to 70c t a = C40c to 85c l l 0.7 0.5 0.4 4 v/mv v/mv v/mv channel separation v out = 1.5v to 3.5v, lt1819 t a = 0c to 70c t a = C40c to 85c l l 81 80 79 100 db db db v out output swing (positive) r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.9 3.8 3.7 4.2 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.7 3.6 3.5 4v v v output swing (negative) r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 0.8 1.1 1.2 1.3 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 1 1.3 1.4 1.5 v v v i out output current v out = 1.5v or 3.5v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 30 25 20 50 ma ma ma i sc output short-circuit current v out = 2.5v, 1v overdrive (note 3) t a = 0c to 70c t a = C40c to 85c 80 70 50 140 ma ma ma sr slew rate a v = 1 1000 v/s a v = C1 (note 5) t a = 0c to 70c t a = C40c to 85c l l 450 375 300 800 v/s v/s v/s fpbw full-power bandwidth 2v p-p (note 6) 125 mhz gbw gain-bandwidth product f = 4mhz, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 240 230 220 360 mhz mhz mhz t r , t f rise time, fall time a v = 1, 10% to 90%, 0.1v step 0.7 ns t pd propagation delay a v = 1, 50% to 50%, 0.1v step 1.1 ns os overshoot a v = 1, 0.1v, r l = 100 20 % hd harmonic distortion hd2, a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 hd3, a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 C72 C74 dbc dbc dg differential gain a v = 2, r l = 150 0.07 % dp differential phase a v = 2, r l = 150 0.07 deg i s supply current per ampli? er t a = 0c to 70c t a = C40c to 85c l l 8.5 10 13 14 ma ma ma note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: differential inputs of 6v are appropriate for transient operation only, such as during slewing. large sustained differential inputs can cause excessive power dissipation and may damage the part. note 3: a heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted inde? nitely. note 4: input offset voltage is pulse tested and is exclusive of warm-up drift. electrical characteristics
lt1818/lt1819 6 18189fb typical performance characteristics supply current vs temperature input common mode range vs supply current input bias current vs common mode voltage input bias current vs temperature input noise spectral density open-loop gain vs resistive load electrical characteristics note 5: with 5v supplies, slew rate is tested in a closed-loop gain of C1 by measuring the rise time of the output from C2v to 2v with an output step from C3v to 3v. with single 5v supplies, slew rate is tested in a closed-loop gain of C1 by measuring the rise time of the output from 1.5v to 3.5v with an output step from 1v to 4v. falling edge slew rate is not production tested, but is designed, characterized and expected to be within 10% of the rising edge slew rate. note 6: full-power bandwidth is calculated from the slew rate: fpbw = sr/2v p note 7: this parameter is not 100% tested. note 8: the lt1818c/lt1818i and lt1819c/lt1819i are guaranteed functional over the operating temperature range of C40c to 85c. note 9: the lt1818c/lt1819c are guaranteed to meet speci? ed performance from 0c to 70c and is designed, characterized and expected to meet the extended temperature limits, but is not tested at C40c and 85c. the lt1818i/lt1819i are guaranteed to meet the extended temperature limits. note 10: thermal resistance ( ja ) varies with the amount of pc board metal connected to the package. the speci? ed values are for short traces connected to the leads. if desired, the thermal resistance can be signi? cantly reduced by connecting the v C pin to a large metal area. temperature (c) C50 C25 0 supply current (ma) 4 12 10 0 50 75 18189 g01 2 8 6 25 100 125 v s = 5v v s = 2.5v per amplifier supply voltage (v) 0 v C input common mode range (v) 1.0 1.5 2.0 v + C2.0 C1.5 2 4 5 18189 g02 0.5 C1.0 C0.5 1 3 6 7 t a = 25c $ v os < 1mv input common mode voltage (v) C5 input bias current (a) t a = 25c v s = 5v 5 18189 g03 C2.5 0 2.5 2 0 C2 C4 C6 C8 temperature (c) C50 C1.2 C0.8 0 25 75 18189 g04 C1.6 C2.0 C25 0 50 100 125 C2.4 C2.8 C0.4 input bias current (a) v s = 5v v s = 2.5v v cm = 0v frequency (hz) 10 100 1 10 i n 100 0.1 1 10 1k 10k 100k 18189 g05 t a = 25c v s = 5v a v = 101 r s = 10k e n input voltage noise (nv/ hz ) input current noise (pa/ hz ) load resistance () 100 open-loop gain (db) 80 77 74 71 68 65 62 1k 10k 18189 g06 t a = 25c v s = 5v v s = 2.5v
lt1818/lt1819 7 18189fb typical performance characteristics output short-circuit current vs temperature output current vs temperature output impedance vs frequency gain and phase vs frequency gain bandwidth and phase margin vs temperature gain vs frequency, a v = 1 open-loop gain vs temperature output voltage swing vs supply voltage output voltage swing vs load current temperature (c) C50 open-loop gain (db) 80 77 74 71 68 65 62 25 75 18189 g07 C25 0 50 100 125 v s = 5v v o = 3v r l = 100 r l = 500 supply voltage (v) 0 v C output voltage swing (v) 1.0 1.5 2.0 v + C2.0 C1.5 2 4 5 18189 g08 0.5 C1.0 C0.5 1 3 6 7 t a = 25c $ v os = 30mv r l = 100 r l = 100 r l = 500 r l = 500 output current (ma) C120 output voltage swing (v) output voltage swing (v) C2 40 18189 g09 C3 C4 C5 5 4 3 2 C80 C40 0 80 120 t a = 25c v s = 5v $ v os = 30mv sink source temperature (c) C50 output short-circuit current (ma) 160 200 240 25 75 18189 g10 120 80 C25 0 50 100 125 40 0 source sink v s = 5v v in = 1v temperature (c) C50 outupt current (ma) 100 125 150 25 75 18189 g11 75 50 C25 0 50 100 125 25 0 $ v os = 30mv v out = 3v for v s = 5v v out = 1v for v s = 2.5v source, v s = 5v sink, v s = 5v source, v s = 2.5v sink, v s = 2.5v frequency (hz) 0.01 output impedance () 0.1 100 1m 100k 10k 10m 100m 18189 g12 1 10 a v = 100 a v = 10 a v = 1 t a = 25c v s = 5v frequency (hz) 10k 20 gain (db) phase (deg) 30 40 50 60 100k 1m 500m 100m 10m 18189 g13 10 0 C10 C20 70 80 60 80 100 120 140 40 20 0 C20 160 180 t a = 25c a v = C1 r l = 500 gain phase temperature (c) C50 C25 gain bandwidth (mhz) phase margin (deg) 440 0 50 75 18189 g15 30 50 40 400 360 25 100 125 gbw v s = 5v gbw v s = 2.5v r l = 500 phase margin v s = 2.5v phase margin v s = 5v frequency (hz) 1m gain (db) C5 0 10m 100m 500m 18189 g16 C10 5 t a = 25c a v = 1 r l = 500 v s = 2.5v v s = 5v
lt1818/lt1819 8 18189fb typical performance characteristics gain vs frequency, a v = 2 gain-bandwidth and phase margin vs supply voltage gain vs frequency, a v = C1 frequency (hz) 1m gain (db) 10m 100m 300m 18189 g17 5 0 C5 C10 10 t a = 25c a v = 2 v s = 5v r f = r g = 500 c f = 1pf r l = 500 r l = 100 frequency (hz) 1m gain (db) C5 0 10m 100m 300m 18189 g18 C10 5 t a = 25c a v = C1 r l = r f = r g = 500 v s = 2.5v v s = 5v supply voltage (v) gain bandwidth (mhz) phase margin (deg) 3 18189 g19 45 35 40 30 24 450 350 400 300 56 t a = 25c gbw r l = 500 gbw r l = 100 phase margin r l = 100 phase margin r l = 500 power supply rejection ratio vs frequency common mode rejection ratio vs frequency slew rate vs input step frequency (hz) 1k 10k 100k 40 power supply rejection ratio (db) 60 80 1m 10m 100m 18189 g20 20 0 100 +psrr psrr t a = 25c a v = 1 v s = 5v frequency (hz) 1k 10k 100k 40 common mode rejection ratio (db) 60 80 1m 10m 100m 18189 g21 20 0 100 t a = 25c v s = 5v v s = 2.5v input step (v p-p ) 0 slew rate (v/s) 800 2000 2 4 5 18189 g22 400 1600 1200 3 6 sr C sr + t a =25c a v = C1 v s = 5v r f = r g = r l = 500 slew rate vs supply voltage slew rate vs temperature differential gain and phase vs supply voltage supply voltage (v) 0 0 slew rate (v/s) 500 2 4 5 18189 g23 1000 1500 2000 1 3 6 7 t a =25c a v = C1 r f = r g = r l = 500 v in = 6v p-p v in = 2v p-p temperature (c) C50 slew rate (v/s) 1600 2000 2400 25 75 18189 g24 1200 800 C25 0 50 100 125 400 0 v s = 5v v s = 2.5v a v = C1 r f = r g = r l = 500 supply voltage (v) 2 0 differential phase (deg) differential gain (%) 0.02 0.06 0.08 0.10 3 4 18189 g25 0.04 0.12 0 0.02 0.06 0.08 0.10 0.04 t a = 25c 5 6 differential gain r l = 150 differential phase r l = 150
lt1818/lt1819 9 18189fb typical performance characteristics channel separation vs frequency 0.1% settling time large-signal transient, a v = C1 frequency (hz) C60 C70 C80 C90 C100 C110 C120 18189 g26 distortion (db) 1m 10m 2m 5m a v = 2 v s = 5v v o = 2v p-p 2nd, r l = 100 2nd, r l = 500 3rd, r l = 500 3rd, r l = 100 frequency (hz) C60 C70 C80 C90 C100 C110 C120 18189 g27 distortion (db) 1m 10m 2m 5m a v = C1 v s = 5v v o = 2v p-p 2nd, r l = 100 2nd, r l = 500 3rd, r l = 100 3rd, r l = 500 frequency (hz) C60 C70 C80 C90 C100 C110 C120 18189 g28 distortion (db) 1m 10m 2m 5m a v = 1 v s = 5v v o = 2v p-p 2nd, r l = 100 3rd, r l = 500 2nd, r l = 500 3rd, r l = 100 frequency (hz) 10k channel separation (db) 60 80 100k 1m 10m 100m 1g 18188 g29 40 20 10 100 70 90 50 30 110 t a = 25c v s = 5v a v = C1 r f = r g = r l = 500 input trigger (1v/div) output settling residue (5mv/div) v s = 5v v out = 2.5v settling time = 9ns a v = C1 r f = r g = 500 c f = 4.1pf 5ns/div 18189 g30 20mv/div 10ns/div 18189 g31 large-signal transient, a v = 1 large-signal transient, a v = C1 small-signal transient, 20db gain 2v/div 5ns/div v s = 5v 18189 g32 1v/div 10ns/div v s = 5v 18189 g33 1v/div 10ns/div v s = 5v 18189 g34 distortion vs frequency, a v = 2 distortion vs frequency, a v = C1 distortion vs frequency, a v = 1
lt1818/lt1819 10 18189fb applications information layout and passive components as with all high speed ampli? ers, the lt1818/lt1819 require some attention to board layout. a ground plane is recommended and trace lengths should be minimized, especially on the negative input lead. low esl/esr bypass capacitors should be placed directly at the positive and negative supply (0.01f ceramics are recommended). for high drive current applications, ad- ditional 1f to 10f tantalums should be added. the parallel combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a pole that can cause peaking or even oscillations. if feedback resistors greater than 500 are used, a parallel capacitor of value c f > r g ? c in /r f should be used to cancel the input pole and optimize dynamic performance (see figure 1). for applications where the dc noise gain is 1 and a large feedback resis- tor is used, c f should be greater than or equal to c in . an example would be an i-to-v converter. in high closed-loop gain con? gurations, r f >> r g , no c f needs to be added. to optimize the bandwidth in these applications, a capacitor, c g , may be added in parallel with r g in order to cancel out any parasitic c f capacitance. capacitive loading the lt1818/lt1819 are optimized for low distortion and high gain bandwidth applications. the ampli? ers can drive a capacitive load of 20pf in a unity-gain con? guration and more with higher gain. when driving a larger capacitive load, a resistor of 10 to 50 must be connected between the output and the capacitive load to avoid ringing or oscillation (see r s in figure 1). the feedback must still be taken directly from the output so that the series resistor will isolate the capacitive load to ensure stability. input considerations the inputs of the lt1818/lt1819 ampli? ers are connected to the bases of npn and pnp bipolar transistors in paral- lel. the base currents are of opposite polarity and provide ? rst order bias current cancellation. due to variation in the matching of npn and pnp beta, the polarity of the input bias current can be positive or negative. the offset current, however, does not depend on beta matching and is tightly controlled. therefore, the use of balanced source resistance at each input is recommended for applications where dc accuracy must be maximized. for example, with a 100 source resistance at each input, the 800na maximum offset current results in only 80v of extra offset, while without balance the 8a maximum input bias current could result in an 0.8mv offset condition. the inputs can withstand differential input voltages of up to 6v without damage and without needing clamping or series resistance for protection. this differential input voltage generates a large internal current (up to 50ma), which results in the high slew rate. in normal transient closed-loop operation, this does not increase power dis- sipation signi? cantly because of the low duty cycle of the transient inputs. sustained differential inputs, however, will result in excessive power dissipation and therefore this device should not be used as a comparator. C + 18189 f01 c load r s r f c f r g in C in + c g figure 1
lt1818/lt1819 11 18189fb applications information slew rate the slew rate of the lt1818/lt1819 is proportional to the differential input voltage. highest slew rates are therefore seen in the lowest gain con? gurations. for example, a 6v output step with a gain of 10 has a 0.6v input step, whereas at unity gain there is a 6v input step. the lt1818/lt1819 is tested for slew rate at a gain of C1. lower slew rates occur in higher gain con? gurations, whereas the highest slew rate (2500v/s) occurs in a noninverting unity-gain con? guration. power dissipation the lt1818/lt1819 combine high speed and large output drive in small packages. it is possible to exceed the maxi- mum junction temperature speci? cation (150c) under certain conditions. maximum junction temperature (t j ) is calculated from the ambient temperature (t a ), power dissipation per ampli? er (p d ) and number of ampli? ers (n) as follows: t j = t a + (n ? p d ? ja ) power dissipation is composed of two parts. the ? rst is due to the quiescent supply current and the second is due to on-chip dissipation caused by the load current. the worst-case load-induced power occurs when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 the supply voltage). therefore p dmax is: p dmax = (v + C v C ) ? (i smax ) + (v + /2)2/r l or p dmax = (v + C v C ) ? (i smax ) + (v + C v omax ) ? (v omax /r l ) example: lt1819is8 at 85c, v s = 5v, r l = 100 p dmax = (10v) ? (14ma) + (2.5v)2/100 = 202.5mw t jmax = 85c + (2 ? 202.5mw) ? (150c/w) = 146c circuit operation the lt1818/lt1819 circuit topology is a true voltage feedback ampli? er that has the slewing behavior of a cur- rent feedback ampli? er. the operation of the circuit can be understood by referring to the simpli? ed schematic. complementary npn and pnp emitter followers buffer the inputs and drive an internal resistor. the input voltage appears across the resistor, generating a current that is mirrored into the high impedance node. complementary followers form an output stage that buf- fer the gain node from the load. the input resistor, input stage transconductance and the capacitor on the high impedance node determine the bandwidth. the slew rate is determined by the current available to charge the gain node capacitance. this current is the differential input voltage divided by r1, so the slew rate is proportional to the input step. highest slew rates are therefore seen in the lowest gain con? gurations.
lt1818/lt1819 12 18189fb typical application single supply differential adc driver C + 1/2 lt1819 v in 18189 ta05 18pf 51.1 5v 5v a in + ltc1744 14 bits 50msps (set for 2v p-p full scale) a in C + C 18pf 51.1 4.99k 0.1f 18pf 10f 4.99k 5v 1/2 lt1819 536 536 results obtained with the circuit of figure 2 at 5mhz. fft shows 81db overall spurious free dynamic range amplitude (dbc) 0 C10 C20 C30 C40 C50 C60 C70 C80 C90 C100 C110 C120 f in = 5.023193mhz f s = 50msps v in = 750mv p-p 8192 samples no windowing no averaging frequency (hz) 0 18189 ta06 5m 10m 15m 20m 25m
lt1818/lt1819 13 18189fb simplified schematic (one ampli? er) 18189 ss out +in Cin v + v C r1 c
lt1818/lt1819 14 18189fb package description ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) msop (ms8) 0307 rev f 0.53 p 0.152 (.021 p .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 C 0.38 (.009 C .015) typ 0.1016 p 0.0508 (.004 p .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 o C 6 o typ detail a detail a gauge plane 12 3 4 4.90 p 0.152 (.193 p .006) 8 7 6 5 3.00 p 0.102 (.118 p .004) (note 3) 3.00 p 0.102 (.118 p .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 p 0.127 (.035 p .005) recommended solder pad layout 0.42 p 0.038 (.0165 p .0015) typ 0.65 (.0256) bsc
lt1818/lt1819 15 18189fb package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 typ 5 plcs (note 3) datum a 0.09 C 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
lt1818/lt1819 16 18189fb package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 o 0 o C 8 o typ .008 C .010 (0.203 C 0.254) so8 0303 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 p .005 recommended solder pad layout .045 p .005 .050 bsc .030 p .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1818/lt1819 17 18189fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number b 5/10 updated order information section 2 (revision history begins at rev b)
lt1818/lt1819 18 18189fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2002 lt 0510 rev b ? printed in usa related parts typical application 80mhz, 20db gain block C + 1/2 lt1819 v in v out 18189 ta03 200 432 C + 1/2 lt1819 200 C3db bandwidth: 80mhz 432 20db gain block frequency response large-signal transient response frequency (hz) 0 gain (db) 10 20 25 100k 10m 100m 18189 ta04 C10 1m 15 5 C5 v s = 5v t a = 25c 10ns/div 1v/div 18189 ta07 part number description comments lt1395/lt1396/lt1397 single/dual/quad 400mhz current feedback ampli? ers 4.6ma supply current lt1806/lt1807 single/dual 325mhz, 140v/s rail-to-rail i/o op amps low noise: 3.5nv/ hz lt1809/lt1810 single/dual 180mhz, 350v/s rail-to-rail i/o op amps low distortion: C90dbc at 5mhz lt1812/lt1813/lt1814 single/dual/quad 100mhz, 750v/s op amps low power: 3.6ma max at 5v lt1815/lt1816/lt1817 single/dual/quad 220mhz, 1500v/s op amps programmable supply current lt6203/lt6204 dual/quad 100mhz, rail-to-rail i/o op amps 1.9nv/ hz noise, 3ma max

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